Τεχνικό φυλλάδιο
Προδιαγραφές
Brand
MicrochipProduct Type
Complex Programmable Logic Device
Series
ATF750C(L)
Number of Macro Cells
10
Number of User I/Os
22
Maximum Propagation Delay Time
15ns
Memory Type
EEPROM
In System Programmability
Yes
Mount Type
Surface
Package Type
PLCC
Minimum Supply Voltage
4.5V
Pin Count
28
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Maximum Supply Voltage
5.5V
Individual Output Enable Control
Yes
Height
4.06mm
Length
11.58mm
Standards/Approvals
No
Maximum Operating Frequency
90MHz
Re-programmability Support
Yes
Automotive Standard
No
Λεπτομέρειες Προϊόντος
This high-performance CMOS complex programmable logic device (CPLD) uses Atmel's proven electrically erasable technology. It is twice as powerful as most other 24-pin PLDs. Increased product terms, sum terms, flip-flops, and output logic configurations translate into more usable gates. High-speed logic and uniform predictable delays guarantee fast in-system performance.
Ημερομηνία αποθέματος προσωρινά μη διαθέσιμη
P.O.A.
Μονάδας (Σε μία ράγα των 38) (Exc. Vat)Χωρίς Φ.Π.Α
38
P.O.A.
Μονάδας (Σε μία ράγα των 38) (Exc. Vat)Χωρίς Φ.Π.Α
Ημερομηνία αποθέματος προσωρινά μη διαθέσιμη
38
Τεχνικό φυλλάδιο
Προδιαγραφές
Brand
MicrochipProduct Type
Complex Programmable Logic Device
Series
ATF750C(L)
Number of Macro Cells
10
Number of User I/Os
22
Maximum Propagation Delay Time
15ns
Memory Type
EEPROM
In System Programmability
Yes
Mount Type
Surface
Package Type
PLCC
Minimum Supply Voltage
4.5V
Pin Count
28
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Maximum Supply Voltage
5.5V
Individual Output Enable Control
Yes
Height
4.06mm
Length
11.58mm
Standards/Approvals
No
Maximum Operating Frequency
90MHz
Re-programmability Support
Yes
Automotive Standard
No
Λεπτομέρειες Προϊόντος
This high-performance CMOS complex programmable logic device (CPLD) uses Atmel's proven electrically erasable technology. It is twice as powerful as most other 24-pin PLDs. Increased product terms, sum terms, flip-flops, and output logic configurations translate into more usable gates. High-speed logic and uniform predictable delays guarantee fast in-system performance.