Τεχνικό φυλλάδιο
Προδιαγραφές
Brand
NexperiaLogic Family
HC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Differential
Triggering Type
Positive Edge
Polarity
Inverting, Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Set/Reset
Yes
Number of Elements per Chip
2
Maximum Propagation Delay Time @ Maximum CL
265 ns @ 2 V
Maximum Operating Supply Voltage
6 V
Dimensions
8.75 x 4 x 1.45mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
8.75mm
Height
1.45mm
Width
4mm
Minimum Operating Supply Voltage
2 V
Propagation Delay Test Condition
50pF
Λεπτομέρειες Προϊόντος
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.
74HC Family
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€ 0,20
Μονάδας (Σε μία ράγα των 57) (Exc. Vat)Χωρίς Φ.Π.Α
€ 0,248
Μονάδας (Σε μία ράγα των 57) Με Φ.Π.Α
57
€ 0,20
Μονάδας (Σε μία ράγα των 57) (Exc. Vat)Χωρίς Φ.Π.Α
€ 0,248
Μονάδας (Σε μία ράγα των 57) Με Φ.Π.Α
57
Τεχνικό φυλλάδιο
Προδιαγραφές
Brand
NexperiaLogic Family
HC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Differential
Triggering Type
Positive Edge
Polarity
Inverting, Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Set/Reset
Yes
Number of Elements per Chip
2
Maximum Propagation Delay Time @ Maximum CL
265 ns @ 2 V
Maximum Operating Supply Voltage
6 V
Dimensions
8.75 x 4 x 1.45mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
8.75mm
Height
1.45mm
Width
4mm
Minimum Operating Supply Voltage
2 V
Propagation Delay Test Condition
50pF
Λεπτομέρειες Προϊόντος
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.