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Texas Instruments SN74LVC08APWR, Quad 2-Input AND Logic Gate, 14-Pin TSSOP

RS Stock No.: 662-8588Brand: Texas InstrumentsManufacturers Part No.: SN74LVC08APWR
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Technical Document

Specifications

Logic Function

AND

Mounting Type

Surface Mount

Number Of Elements

4

Number of Inputs per Gate

2

Schmitt Trigger Input

No

Package Type

TSSOP

Pin Count

14

Logic Family

LVC

Maximum Operating Supply Voltage

3.6 V

Maximum High Level Output Current

-24mA

Maximum Propagation Delay Time @ Maximum CL

3.9 ns @ 3.3 V, 4.6 ns @ 2.7 V

Minimum Operating Supply Voltage

1.65 V

Maximum Low Level Output Current

24mA

Minimum Operating Temperature

-40 °C

Height

1.15mm

Dimensions

5 x 4.4 x 1.15mm

Propagation Delay Test Condition

50pF

Maximum Operating Temperature

+125 °C

Length

5mm

Width

4.4mm

Product details

74LVC Family Logic Gates, Texas Instruments

Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.

Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22

74LVC Family

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Texas Instruments SN74LVC08APWR, Quad 2-Input AND Logic Gate, 14-Pin TSSOP
Select packaging type

P.O.A.

Each (In a Pack of 10) (Exc. Vat)

Texas Instruments SN74LVC08APWR, Quad 2-Input AND Logic Gate, 14-Pin TSSOP
Stock information temporarily unavailable.
Select packaging type

Stock information temporarily unavailable.

Please check again later.

Ideate. Create. Collaborate

JOIN FOR FREE

No hidden fees!

design-spark
design-spark
  • Download and use our DesignSpark software for your PCB and 3D Mechanical designs
  • View and contribute website content and forums
  • Download 3D Models, Schematics and Footprints from more than a million products
Click here to find out more
You may be interested in
Nexperia 74LVC08APW,112 Buffer & Line Driver, 14-Pin TSSOP
P.O.A.Each (In a Pack of 20) (Exc. Vat)

Technical Document

Specifications

Logic Function

AND

Mounting Type

Surface Mount

Number Of Elements

4

Number of Inputs per Gate

2

Schmitt Trigger Input

No

Package Type

TSSOP

Pin Count

14

Logic Family

LVC

Maximum Operating Supply Voltage

3.6 V

Maximum High Level Output Current

-24mA

Maximum Propagation Delay Time @ Maximum CL

3.9 ns @ 3.3 V, 4.6 ns @ 2.7 V

Minimum Operating Supply Voltage

1.65 V

Maximum Low Level Output Current

24mA

Minimum Operating Temperature

-40 °C

Height

1.15mm

Dimensions

5 x 4.4 x 1.15mm

Propagation Delay Test Condition

50pF

Maximum Operating Temperature

+125 °C

Length

5mm

Width

4.4mm

Product details

74LVC Family Logic Gates, Texas Instruments

Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.

Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22

74LVC Family

Ideate. Create. Collaborate

JOIN FOR FREE

No hidden fees!

design-spark
design-spark
  • Download and use our DesignSpark software for your PCB and 3D Mechanical designs
  • View and contribute website content and forums
  • Download 3D Models, Schematics and Footprints from more than a million products
Click here to find out more
You may be interested in
Nexperia 74LVC08APW,112 Buffer & Line Driver, 14-Pin TSSOP
P.O.A.Each (In a Pack of 20) (Exc. Vat)